CS401 Computer Architecture and Assembly Language Online Solved Quizzes/MCQ's File No 1


In the operation of ___________
instruction, the most significant bit is
copied to the carry flag and is
inserted from the right, causing every
bit to move one position to the left .
Select correct option :

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Rotate Left ( ROL)
Rotate Through Carry Right ( RCR)
Rotate Through Carry Left (RCL )
Rotate Right (ROR )

By default CS is associated with
Select correct option :
SS
BP
CX
IP

Assembly languague is not a low level language.
true
False
In JA jump is not taken after a CMP if the unsigned destination is larger than the unsigned source.
True
False

Group of bits processor uses to inform memory which element to read/write is collectively known as
Control bus
Data bus
Address bus
RAM


Memory to Memory operation is allowed
True
False

Far jump is position relative.
Select correct option:
True
False


The _______________ operation is
about shifting every bit one place to
the right with a copy of the most
significant bit left at the most
significant place . The bit dropped from
the right is caught in the carry basket .
Select correct option :
Shift Logical Left (SHL )
Shift Logical Right ( SHR )
Shift Arithmetic Right ( SAR )
Shift Arithmetic Left (SAL )
Question # 4 of 10 ( Start time:
09 :57 :25 PM ) Total Marks: 1
All the addressing mechanisms in
iAPX 88 return a number called
_____________ address .

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Select correct option :
Effective
Physical
Direct



CX register is mostly used as a
Select correct option :
counter register
flag register
base register
desination register

In interrupt masking , We use ________
to get control from the program
without letting the program know about
it.
Select correct option :
IRQ 0
IRQ 1
IRQ 2
IRQ 3
In JA jump is not taken after a CMP if the unsigned destination is larger than the unsigned source.
Select correct option:
True
False


In And the out put only one if
Select correct option:
Both inputs are 0
One is 0 and other is 1
Both are 1
None of the given

Data bus is ___________ .
Select correct option :
Uni - directional
Bi- directional
multi - directional
None of the given

This jump is taken if the last arithmetic operation produced a number in its destination that has even parity , Which jump is taken
Select correct option:
JP
JPE
JNP
both JP and JPE )

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Stack is a data structure that behaves ____________manner. Select correct option:
LIFO
FIFO
Both LIFO and FIFO
None of the given


The Operation of pop ax is AX <-- [SP] SP <-- SP-2
Select correct option:
True
False     (69)

SS is by default associated with
Select correct option :
BP
IP
SP
BP




In XOR operation the output is 1 if
Select correct option:
both inputs are same
both inputs are differents
I and II
none of the above


__________ transfers the word at the current top of stack (pointed to by SP) to the destination operand and then increments SP by two to point to the new top of stack. Select correct option:

PUSH
POP
CALL
None of the given



Conditional jumps can only
Select correct option:
far
short
near
All of the given



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Select correct option :
The msb is replaced by a 0
The msb retains its original value
The msb is replaced by 1
The msb is replaced by the value of CF

All the addressing mechanisms in
iAPX 88 return a number called
_____________ address .

Vukwl- Virtual Education Solution

Select correct option :
Effective
Physical
Direct
Base

its if BL contains 00000101 then after
a Single Right Shift , BL will contain
Select correct option :
00000011
00000010
10000011
10000010

The mechanism used to drop carry for
making the calculated address valid is
known as :
Select correct option :
Carry Overload
Overflow
Address Wraparound
Segment Overlapping

A complete _______ is called a pass
over the array
Select correct option :
jump
iteration
comparison
condition

Physical address calculation depends on
Select correct option :
Base address
Effective address
Offset Address
Segment Address

In ______ operation, a carry flag is
inserted from the left moving every
bit one position to the right , with the
right most bit is dropped in the carry
flag" .
Select correct option :
RCR
ROL
RCL
ROR

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On executing INT 0 x 21 service 0 x 3 D , if
file is successfully opened then
Select correct option :
CF will contain 1
CF will contain 0
ZF will contain 1
ZF will contain 0


As compared to _________ ,
___________ provides more cooked
services.
Select correct option :
BIOS, DOS
DOS,OS
DOS, BIOS
OS, DOS

Which of the following registers hold
the page number for using the write
string service of INT 10 ?
Select correct option :
AH
BL
CL
BH

In multitasking environment , which of
the following structure is used to
maintain the ordering of active PCBs ?
Select correct option :
Array
Register
Linked List
Stack

Which of the following registers hold
the page number for using the write
string service of INT 10 ?
Select correct option :
AH
BL
CL
BH

While dealing with a stack , can a stack
pointer cross the origin of the stack .
Yes
No
The attribute byte uses the _____ color
model for the foreground and the
background.
CMYK
RGB
Black n white

To access the arguments from the
stack, the immediate idea that strikes
is to ______ them off the stack .
PUSH
POP
ADD
INSERT

The direction of movement is
controlled with the
SS is bydefult associated with
BP
IP
SP
BP


Register to constant data movement is
allowed ?
No
Yes




The simplest form of addressing, in
which the operand value is present in
instruction is
Select correct option :
Direct Addressing
Indirect Addressing
Immediate Addressing
None of them


mov [ bx + si ] , ax is an example of
Indexed Register Indirect.
Select correct option :
True
False


mov [ 1234] ,ax is an example of
Select correct option :
Direct addressing
Base register indirect
Base + index
None of the given


This JCXZ jump is taken whenever
counter resets .
Select correct option :
Yes
No


__ jump is not position relative but is
absolute
Select correct option :
Near
Short
Far
None of the above


Size Mismatch Error is a syntax error
Select correct option :
False
True


The effective address will be either a
main memory address or a register .
Select correct option :
True
False


we can not Subrtace index register
from the base register ( bx - si ) in
assemlby language
Select correct option :
True
False
ANY ONE ELSE /




By default CS is associated with
Select correct option :
SS
BP
CX
IP


The stack pointer contains the address
of the word that is currently on_ _ :
Select correct option :
Top of the stack
Down of the stack
Top and Down both
None of the above


The stack pointer contains the address
of the word that is currently on_ _ :
Select correct option :
Top of the stack
Down of the stack
Top and Down both
None of the above


Constant is never use as a
Select correct option :
Source
Destination
Both as source and destination
None of the given


Register to memory operation is not
allowed
Select correct option :
True
False


The first 16 - bit processor produced by
“ Intel ” was 8085
True
False


The Jump command that doesnot
depends on FLAG register is
Select correct option :
JCXZ
JO
JNE
JP


__ jump is not position relative but is
absolute
Select correct option :
Near
Short
Far
None of the above
far


Memory to Memory operation is allowed
Select correct option :
True
False


Which register holds the item that is to
be written into the stack or read out
of the stack :
Select correct option :
SP
IP
BX
DX
SP


The process through which the segment
register can be explicitly specified is
known as
Select correct option :
Segment Addressing
Segment Override Prefix
Segment Indexing
None of the above


In JZ jump is not taken if the last
arithmetic operation produced a zero in
its destination .
Select correct option :
True
False


we can not add two base register i .e .
(bx + bp ) or cant use in an instruction
Select correct option :
True
False


Physical address calculation depends on
Select correct option :
Base address
Effective address
Offset Address
None of the above




SI or DI is used we name the method .
Select correct option :
Based Addressing
Indexed Addressing
Stack Addressing
None of the above


FLAG register in Intel x 86
microprocessors that contains the
current state of the processor
Select correct option :
True
False

 In the instruction "CMP AX,BX" the contents of
O   AX are changed

BX are changed 
CX are changed
Flag register are changed                  

All the addressing mechanisms iniAPX88 return a number called ______ address.
Effective                
faulty
indirect
O   direct

The execution of the instruction "mov word [ES: DI], 0x0720"
will clear next character on screen                  
will print "20" at top left of the screen
will print "20" at top right of the screen
will move DI at location 0720 on the screen


"mov byte [num1],5" is _____instruction. 
      O legal 
illegal
stack based
memory indirect


The addressing method that can be
used to access a two dimensional array
is.
Select correct option :
Base + Index + Offset addressing
Base + Index addressing



we can not add two base register i .e .
(bx + bp ) or cant use in an instruction
Select correct option :
True
False


Which type of Rotation it is " Every bit
moves one position to the right and the
bit dropped from the right is inserted
at the eft . This bit is also copied into
the carry flag. "
Select correct option :
ROL
RCR
RCL
None of the given

All the addressing mechanisms in
iAPX 88 return a number
called ___________ address .
Select correct option :
EFFICTIVE address
physical address
direct


Which one of the following is a illegal
instruction
Select correct option :
MOV AX ,BX
MOV AX ,65
MOV ax ,[ bx + bp ]
none


IRET returns on the basis of ________ and __________ .
Select correct option :
CS , IP
DS, IP
CS , SS
IP, SP

8088 is a 16bit processor with its accumulator and all registers of __________. 
32 bits 
6 bits

16 bits               
64 bits



decrements SP (the stack pointer) by two and then transfers a word from the source operand to the top of stack

PUSH               
POP
CALL
RET  

After the execution of instruction "RET"
SP is incremented by 2                  

SP is decremented by 2 O SP is incremented by 1 O SP is decremented by 1


The extended ASCII has
64 characters
128 characters                
256 characters O 502 characters


we can not Subrtace index register
from the base register ( bx - si ) in
assemlby language
true
false


The effective address will be either a
main memory address or a register .
true
false


CX register mostly use a
flag register
destination register
baase register
COUNTER


The FLAG register in Intel x 86
microprocessors that contains the
current state of the processor
Select correct option :
True
false


The Jump command that doesn’ t
depends on FLAG register is
Select correct option :
JCXZ
JO
JINE
JP


when a 32 bit number is divided by a
16 bit number , the remainder is of
4 bit
8 bit
32 bit


SHL and SAL are same
true
false

The purpose of MOVS instruction is to
move a memory location to register
Select correct option :
True
False

Loading a segment register with an
immediate operand is not allowed in
the 8088 architecture. Select correct
option :
True
False

An element is pushed on the stack SP is
decremented by ______ as the 8088
stack works on word sized elements .
Select correct option :
Three
Two
Four
Five

There are just ______ block processing
instructions in 8088.
Select correct option :
6
5
4
3

MUL ( multiply ) Instruction performs an
unsigned multiplication of the source
operand and the __________.
Select correct option :
Accumulator
Carry
Word
Base



The simplest form of addressing, in
which the operand value is present in
instruction is
Select correct option :
direct addressing
indirect addressing


The simplest form of addressing, in
which the operand value is present in
instruction is
Select correct option :
Direct Addressing
Indirect Addressing
Immediate Addressing
None of them


Register to Register Operation is not
allowed
Select correct option :
True
False


Instruction Pointer holds the address of the  
 Previous instruction to be executed
 Current instruction
 Next instruction to be executed
 None of the given


In the instruction MOV AX, 5 the number of operands are
1
2                   

3 
4


The maximum parameters a subroutine can receive (with the help of registers) are
6
7                  
8
9


In assembly the CX register is used normally as a ______________register.

source
counter                   
index

pointer


Register whose each bit specify a different meaning is 
 Accumulator Register                                        
 Pointer Register 
 Index register 
 Flag register



Bydefault CS is associated with  
 SS
 BP
 CX
 IP  


  

Register are storage cell  
 Outside the processor
 Both inside and outside the processor
 Inside the processor
 None of the given               \



Register to Register Operation is not allowed  
 True
 False

The operation of CMP is to Subtract source from destination
 True
 False

Size Mismatch Error is a syntax error
False
True

Unconditional jump
Execute in every condition whether true or false
If the condition is true
If the condition is false
None of the given

Which type of Rotation it is "Every bit moves one position to the right and the bit dropped from the right is inserted at the eft. This bit is also copied into the carry flag."
ROL
RCR
RCL
None of the given

Assembly languague is not a low level language.
true
False
In JA jump is not taken after a CMP if the unsigned destination is larger than the unsigned source.
True
False

Group of bits processor uses to inform memory which element to read/write is collectively known as
Control bus
Data bus
Address bus
RAM


Memory to Memory operation is allowed
True
False

90 is the op-code of
Do nothing
Add
Subtract
Multiplication

we can not add two base register i.e. (bx+bp) or cant use in an instruction
True
False


Intel follow
Littel endian
Big endian
Both littel endian and big endian
None of the given


SHL and SAL are same
True
False

The first 16-bit processor produced by "Intel" was 8085
True
False


The first 16-bit processor produced by "Intel" was 8085
True
False


The extension of assembly languague file is
.doc
.com
.lst
.asm


When a large number is subtracted from a smaller number, a borrow is needed; in this case which flag will be set
ZF
CF
SF
OF


All the addressing mechanisms in iAPX88 return a number called _____________ address.

Effective address
Physical address
Direct address
None of the given

Which type of shifting is "Inserts a zero from the left and moves every bit one position to the right and copies the rightmost bit in the carry flag."
SHL
SAL
SAR
None of the given

mov [1234],ax is an example of
Direct addressing
Base register indirect
Base+index
None of the given

Which mathematical operation is dominant during the execution of SCAS instruction 
Division

Multiplication
Addition
Subtraction                



After the execution of REP instruction CX will be decremented then which of the following flags will be affected?

CF
OF
DF

No flags will be affected                  



Registers are also called scratch pad ram
True
False


The basic function of register is to?
Hold the operand
Hold the operator
Hold both the operator and operand
None of the given


The jump is taken if the last arithmetic operation changed the sign unexpectedly.
JO
JNO
JNZ
JZ


In JA jump is not taken after a CMP if the unsigned destination is larger than the unsigned source.
True
False

which type of rotation it is "The carry flag is inserted from the left, every bit moves one position to the right, and the right most bit is dropped in the carry flag. "
RCR
ROL
RCL
ROR


which type of rotation it is "The carry flag is inserted from the left, every bit moves one position to the right, and the right most bit is dropped in the carry flag. "
RCR
ROL
RCL
ROR
BP by default associated with
Select correct option:
CS
IP
SS
SP
 
In direct addressing the memory address given in the instruction is
Select correct option:
Fixed
Variable
Register
Empty

Register to memory operation is not allowed
Select correct option:
True
False
Register to Register Operation is not allowed
Select correct option:
True
False

This jump is taken if the last arithmetic operation produced a number in its destination that has even parity , Which jump is taken
JP
JPE
JNP
both JP and JPE

In direct addressing the memory address given in the instruction is

When a large number is subtracted from a smaller number, a borrow is needed; in this case which flag will be set
ZF
CF
SF
OF

SHL and SAL are same
True
False


Group of bits processor uses to inform memory which element to read/write is collectively known as
Select correct option:
Control bus
Data bus
Address bus
RAM

The basic function of register is to
Select correct option:
Hold the operand
Hold the operator
Hold both the operator and operand
None of the given

which type of rotation it is "The carry flag is inserted from the left, every bit moves one position to the right, and the right most bit is dropped in the carry flag. "
Select correct option:
RCR
ROL
RCL
ROR
mov [bx+si], ax is an example of Indexed Register Indirect.
Select correct option:
True
False

Register whose each bit specify a different meaning is
Select correct option:
Accumulator Register
Pointer Register
Index register
Flag register

Motorola follow
Select correct option:
Big endian
Litten endain
Both of them
None of the given
we can not Subrtace index register from the base register( bx-si )in assemlby language   
True
False

Group of bits processor uses to inform memory which element to read/write is collectively known as
Control bus
Data bus
Address bus
RAM




The first instruction of "COM" file must be at offset: 
► 0x0010

► 0x0100         
 0x1000
 0x0000



The execution of the instruction "mov word [ES : 0], 0x0741" will print character "A" on screen , background color of the screen will be

► Black               
 White
 Red 
 Blue



The iAPX888 architecture consists of _______ register.
12

14

16

18




The execution of the instruction "mov word [ES: 0], 0x0741" will print "A" on the screen, color of the character will be
Black

White              
Red
Blue

One screen location corresponds to a

Byte
Word                 
Double byte
Double word


When an item is pushed on the decrementing stack, the top of the stack is

First decremented and then element copied on to the stack                 
First incremented and then element copied on to the stack
Decremented after the element copied on to the stack

Incremented after the element copied on to the stack



Each screen location corresponds to a word, the lower byte of this word contains ____

The character code                
The attribute byte

The parameters 
The dimensions



if ax contains decimal -2 and BX contains decimal 2 then after the execution of instructions: CMP AX, BX ,JA label

Jump will be taken
Zero flag will set

ZF will contain value -4 
Jump will not be taken


If D is "35" is shift to left 2 bits the new value

► 35 
70
140
17



When two 16bit numbers are added the answer can be 17 bits long, this extra bit that won't fit in the target register is placed in the where it can be used and tested

carry flag               
Parity Flag

Auxiliary Carry
Zero Flag


Only instructions allow moving data from memory to memory.

► string              
 word
 indirect

 stack


When a 16 bit number is divided by an 8 bit number, the quotient will be in

► AL               
AX
AH

DX


Which bit of the attributes byte represents the red component of background color ?
3

4

5

6



| 0 |--›| 1 | 1 | 0 | 1 | 0 | 0 | 0 | --›| C | is a example of ______
Shl 
sar

Shr 
Sal


allow changing specific processor behaviors and are used to play with it.

Special Instructions                 
Data Movement Instructions

Program Control Instructions 
Arithmetic and Logic Instructions


8088 is a 16bit processor with its accumulator and all registers of __________. 
32 bits 
6 bits

16 bits               
64 bits



decrements SP (the stack pointer) by two and then transfers a word from the source operand to the top of stack

PUSH                
POP

CALL
RET  

After the execution of instruction "RET"
SP is incremented by 2                   

SP is decremented by 2 O SP is incremented by 1 O SP is decremented by 1


The extended ASCII has
64 characters
128 characters                 

256 characters O 502 characters

The second byte in the word designated for screen location holds
The dimension of the screen
Character position on the screen
Character color on the screen                  
ACSII code of the character

REP will always
Incremented CX by 1
Incremented CX by 2
Decremented CX by 1                
Decremented CX by 2

The routine that executes in response to an INT instruction is called
ISR                  
IRS
ISP 
IRT

The iAPX888 architecture consists of _______ register.
12
14
16                  
O   18

In the instruction "CMP AX,BX" the contents of
O   AX are changed

BX are changed 
CX are changed
Flag register are changed                   

All the addressing mechanisms iniAPX88 return a number called ______ address.
Effective                 
faulty
indirect
O   direct

The execution of the instruction "mov word [ES: DI], 0x0720"
will clear next character on screen                 
will print "20" at top left of the screen
will print "20" at top right of the screen
will move DI at location 0720 on the screen


"mov byte [num1],5" is _______ instruction. 
legal (Page 30)
illegal
stack based
memory indirect

MOV instruction transfers a byte or word from which of the following source location.
DS:DI
ES:SI 
ES:DI
DS:SI

The execution of the instruction "mov word [ES: 0], 0x0741" will print "A" on the screen, color of
the character will be
Black
White                  
O   Red
O   Blue

If AX contains FFFFh, then after execution of instruction "SAL ax, 3", the result will be
O   -3
O   +3
O   -8
O   +8

If the decimal number "35" is shifted by two bit to left, the new value will be
O   35
70
140 (00100011 = 35 , 10001100=140)
O   17

While using STOBS, if DF=1 then
O   The value of SI will be incremented by one
O   The value of SI will be incremented by two
The value of SI will be decremented by one                  
The value of SI will be decremented by two

After the execution of STOSW, the CX will be
Decremented by 1
Decremented by 2                 
Incremented by 1
Incremented by 2


The memory address always move from 
processor to memory
memory to processor

memory to peripheral 
peripheral to processor

An offset alone is not complete without 
Segment 
code label

index register 
data label

20. Code Segment is associated to _______ register by default.
IP                  
SS
BP
CX



After the execution of SAR instruction:

MSB remain as it is
MSB Will change
MSB move to left              
No change will occur.



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